In self-timed processors, data is staged through the logical elements constituting the processor under the control of the logical elements themselves. When a logical element evaluates, it informs the preceding stages from which it receives data, which may then reset. When all of the logic blocks inputting signals to a particular logic block have reset, then that block resets. Thus, the speed at which data is transmitted through a self-timed processor depends on the evaluation speed of the underlying logic blocks.
The power consumption of a self-timed processor is substantially directly proportional to the processor's speed. Concomitantly, the processor's temperature is substantially proportional to the power consumed. As a consequence, the performance of self-timed processors may be limited by the processor's thermal capabilities, including the ability of its packaging to dissipate heat. Circuits in self-timed processing systems may be designed with aggressive speed targets if a method may be had that continuously controls the speed of the circuits as a function of temperature.
Thus, there is a need in the art for an apparatus and method that continuously monitors the temperature of the logic circuitry in self-timed processors, and which adjusts the speed of the circuits in accordance with a temperature specification. The apparatus and method speed up the circuitry if the processor is running cool, or slow the circuitry down if the processor temperature exceeds a predetermined value.